A 50MHz-BW Continuous-Time ΔΣ ADC with Dynamic Error Correction Achieving 79.8dB SNDR and 95.2dB SFDR

A 50MHz-BW Continuous-Time ΔΣ ADC with Dynamic Error Correction Achieving 79.8dB SNDR and 95.2dB SFDR

A 15.2-ENOB Continuous-Time ΔΣ ADC for a 7.3μW 200mVpp-Linear-Input-Range Neural Recording Front-End

A 13-ENOB 2nd-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using an Error-Feedback Structure

A 1.1mW 200kS/s Incremental ΔΣ ADC with a DR of 91.5dB Using Integrator Slicing for Dynamic Power Reduction

A 280μW Dynamic-Zoom ADC with 120dB DR and 118dB SNDR in 1kHz BW

A 0.4V 13b 270kS/s SAR-ISDM ADC with an Opamp-Less Time-Domain Integrator

A Signal-Independent Background-Calibrating 20b 1MS/s SAR ADC with 0.3ppm INL

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